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IP Core


Use Ethernet Your Way!

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The Murano 10/100 EMAC core is based on the 10/100 EMAC developed by Igor Mohor and popularized on the website This core has been used in several production products, ASICs, and has been integrated by vendors such as Flextronixs into their custom ASIC/IP programs.

Combined Core

FLE has combined this core with our proprietary technology allowing Wishbone Master/Slave peripherials to be added directly to the new Xilinx PLB Bus. FLE has further optimized the Murano core for synthesis within Xilinx Virtex4, Spartan3, and Spartan3E FPGAs and tagetting both PowerPC and Microblaze V7.X processor cores.


The Murano EMAC Core provides the following key features:

  • Direct integration with Xilinx Microblaze and PowerPC PLB V43.6 Bus
  • Full DMA transmission/receiption of Ethernet Frames for reduced overhead
  • Provides hardware interrupt for status and error responses
  • Internal 512x32 FIFOs to implement dual 2048 byte inbound/outbound buffers
  • Operates at Clock speeds from 50MHz to over 125MHz
  • Configurable for 10/100 Full and Half Duplex Operation
  • Provides MDIO access to external PHY
  • Operates with the FLE FUSION uCLinux Microblaze Kernel
  • Ultra High Performance capabilities by configuring upto 128 off-chip RX/TX buffers
  • Software Adjustable Broadcast and Multicast receiver flow control to prevent denial-of-service attacks and to provide excellent stability in high load networks.
  • Full implementation requires 1400-1500 slices and 5 Block Rams

The MURANO is provided in three forms:

Free Version

  • Completely free and fully functional implementation of the 10/100 Ethernet MAC.
  • No timelimits or other "loss-of-function" blocks are implemented in this version
  • Also available within the FUSION Reference designs files
  • Provided under the F3 License Program
  • Free MAC Limitations
    • Limited to 10-20KB/s ThroughPut
    • Can only be mapped into Address 0xC000:0000 to 0xC000:FFFF

Download Free Version

10/100 EMAC Trial Version

  • Trial version of the Full EMAC implementation
  • The core will be held in reset after approximately 5000 Packet Transfers
  • No bandwidth limits or other reduction in functionality
  • Provided under the FCL License Program

Get 10/100 EMAC Trial Version

10/100 EMAC Commercial Version

  • Full 10/100 EMAC implementation
  • No timeouts, resets, or bandwidth limits
  • Licensed under the “Unlimited IP Licence” agreement for reuse in all company products
  • Provides 30-days of engineering support from Finger Lakes Engineering to help with driver/testing/integration questions
  • Provided under the FCL License Program
  • Upon purchase, FLE will provide a direct link to download the Commerical EMAC Core

Get 10/100 EMAC Commercial Version

Murano Hardware Architecture

Murano Architecture